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Re SP-11 config file




Hello!

At first - I'm not really sure, why your mail to the list was bounced.

Now to your question:

At first we have to determine, what kind of board you have. A IC-DIG is
the older one sandwich board. It has a 44pin connector. Do you have this
kind of board?
I ask, because the included config file was for a PC-DIG, this is the
successor of the IC-DIG.

Anyway, I have converted this file for you...

But if you are using a IC-DIG, please send me your clc5-based file and
some error output of the test_itifg program run. Any additional output
from /var/log/messages (with the debug module itifg_g.o loaded) will
be helpful.

					matthias  

-------------------------------------------------------------------------------
GOM mbH                                                 Tel.: ++49 531/3804-330
Gesellschaft fuer optische Messtechnik                  Fax.: ++49 531/3804-333
Rebenring 33                                            Mail: M.Stein@gom.com
38106 Braunschweig GERMANY                              http://www.gom.com
-------------------------------------------------------------------------------
#
# Example Configuration File for PCDig Module
# Camera: Dalsa SP-11-02K40-11E
#
# Matthias Stein 07/99
#


[PCD:0]			# Board 0

      CAMERA_NAME = "Dalsa SP-11-02K40-11E fps:1 (force)"
      EXO_FILENAME = "p1b1tn00.exo"
      LEN_SYNC = SYNC
      LEN_POLARITY = RISING_EDGE
      FEN_ENABLE = DISABLE
      FEN_POLARITY = RISING_EDGE
      MULTI_ENABLE = DISABLE
      MULTI_POLARITY = ACTIVE_LOW
      MULTI_INPUT_MODE = MULTI_INPUT_FIELD
#     PCLK_POLARITY = FALLING_EDGE		# read only register
#     MULTI_OUTPUT_ENABLE = DISABLE		# this is not configurable
#     USE_EXT_MULTI = DISABLE			# this is not configurable
      RETIME_ENABLE = DISABLE
      RETIME_POLARITY = FALLING_EDGE
      CAM3_ENABLE = DISABLE
      EXSYNC_ENABLE = ENABLE
      EXSYNC_POLARITY = ACTIVE_LOW
      EXSYNC_MODE = EXSYNC_FREE_RUNNING
      PRI_ENABLE = DISABLE
      PRI_POLARITY = ACTIVE_LOW
      CAM_MODE_CTL = 15
      CCLK_STATIC_ENABLE = DISABLE
      CCLK_STATIC_STATE = LEVEL_HIGH
#     EXT_SYNC_TIME = 572.000			# us (140ns ... 572us)
      # default exposure time !!!
      EXT_SYNC_PERIOD_TIME = 40000.000		# us (210ns ... 18.75s)
      # default readout time !!!
      EXSYNC_MIDPOINT_DELAY = 120000.000	# us (210ns ... 18.75s)
      # this controls the same as the above value (readout time)
      # the last value is the important (overwrites the first)
      PRI_MIDPOINT_DELAY = 120000.000		# us (210ns ... 18.75s)
      EXSYNC_START_LOCATION = EXSYNC_START_CYCLE_END
      PRI_START_LOCATION = PRI_START_CYCLE_END
      PRI_END_LOCATION = PRI_END_IS_START_DEPEND
      HORZ_OFF = 0
      WIDTH_PIXELS = 2048
      VERT_OFF = 40
      HEIGHT_PIXELS = 1024
      CCLK_FREQ_SEL = 35.758984			# MHz (320kHz ... 100MHz)
      PIXEL_SIZE = 8
      TRIGGER_POLARITY = FALLING_EDGE,FALLING_EDGE
      TRIGGER_SRC = TTL_TRIG,TTL_TRIG
      TRIG_GLITCH_DETECTOR = DISABLE,DISABLE
#     TRIGGER_STATE = LEVEL_HIGH,LEVEL_LOW	# read only register
#     GEN_SW_TRIGGER = 2118125364,2118125364	# this is not configurable
      TRIG_DIVIDE_FACTOR = 256
      TRIG_DIVIDE_CONTROL = DISABLE_TRIG_DIVIDE
#     PARAM_GROUPS_APPLICABLE = 14
#     IMAGE_GEOMETRY = 1CHAN_L2R
#     NUM_CAMERAS = 1