Re: Need assistance with itifg driver.

["M.Stein" <matthias@gom.com>]

Hi Thomas!

On Thu, 20 Apr 2000, Thomas Dilligan wrote:

> 
> Greetings:
> 
> I am attempting to get the itifg driver test program working with my
> board / camera. I am using the 4MB IC-DIG interface card with a SMD
> 6M3P_20 camera (3072 x 2048 greyscale), the host machine is a Compaq
> Pentium II box with 128MB of memory. I have verified that this
> configuration does work with Windows 95.
> 
> I can get the test program to recognise the board, and bring up a window
> of the correct size, but when the read() is performed from the device,
> an I/O error is returned. The following message appears in
> /var/log/messages:
> 
> itifg[0I]: board: 0, module: 4, camera: 0.
> itifg[0D]: iti_read 6280196 byte(s).
> itifg[0D]: iti_bma_src_init.
> itifg[0D]:              raw_size 0x5fd404
> itifg[0E]: cr_set_pitch: mask error
> 
> Looking at the cr_set_pitch function in the driver does not provide any
> clues as to why it's failing.
> 
> Does anyone out there have any experience in using the itifg with
> high-resolution cameras, or has anyone seen this sort of error / problem
> before?
>

I have tested the 6m3p successfully with the 0.6.0a driver. The config
file is included.
Your error message maybe a result of a not aligned horizontal size (not
divideable by 8).

Please can you test your camera also with the 0.7.0beta driver, because
I can't test it here.

						matthias 
> Thanks.
> 
> >>>Tom
> 
> ---
> Tom Dilligan
> Senior Systems Developer
> Industrial Light + Magic
> 
#
# Example Configuration File for AM-DIG Module
# Camera: Kodak MegaPlus 6.3i (8Bit)
#
# Matthias Stein 09/99
#


[ICP:0]			# Board 0

[AM-DIG]		# Module AM-DIG

[CameraPort:0]		# Camera 0

      Camera_Name = "Kodak MegaPlus 6.3i fps:0.5 (force)"
      Horizontal_Active = 3072
      Horizontal_Offset = 29
      Vertical_Active = 2048
      Vertical_Offset = 6
      NonInterlaced
      NonInterleaved_Pixels
      Area_Scan
      LEN_Wide
      No_LineMiss_Mode
      Normal_FIFO_Mode
      Xillix_Mode_Disable
      Pixel_Size_12
      CCLK_14.32MHz
      CCLK_Div1
      EXSync_Counter_Disable
      ExtSync_Mode = FEN_Trigger
      EXSCLK_14.32_Div2048
      EXSCLK_CounterPreset = 2047
      EXSYNC_Pulse_Active_Low
      PRI_Active_Low
      Trigger_Gen_Disable
      Trigger_Source = External
      Camera_Mode = 6		# exposure time/pulse generated by camera
      AM_OutputA = Low_Byte
      AM_OutputB = Low_Byte
      AM_OutputC = Low_Byte
      PCLK_Invert
      LEN_NoInvert
      FEN_NoInvert
      FLD_NoInvert